The present invention relates to a semiconductor device, and a method for forming the semiconductor device. In particular, the invention relates to a method for forming a multi-layer semiconductor device in which at least two of the layers are bonded by an annealing bonding process.
As miniaturisation requirements in the semiconductor industry grow, the demand for semiconductor devices with increasing numbers of features similarity grows. In the field of laser and sensor technology semiconductor devices which include micro-electro-mechanical components and micro-opto-electro-mechanical components are commonly required. Such devices are typically multi-layer devices which include multiple layers of semiconductor material and/or other suitable materials. The micro-components are typically formed in one of the semiconductor layers, while circuitry is formed in the other layers, and may also be formed on the micro-component layer. The circuitry may be provided for controlling the micro-components and may also be provided for other functions. In certain cases some or all of the circuitry for controlling the micro-components may be provided on a separate discrete semiconductor device. In general, it is desirable, and indeed in many cases it is a requirement that the respective semiconductor layers should be electrically insulated, one from the other. This requires the formation of insulating layers between the respective semiconductor layers. Such insulating layers, are typically provided by oxide layers, which may be grown or deposited. Because of the number of semiconductor layers, in general, it is necessary to bond some of the layers together by suitable bonding processes, typically, high temperature annealing processes. Typically, a semiconductor layer is bonded to an oxide layer which had been grown or deposited on another semiconductor layer. The surface of the semiconductor layer to be bonded to the oxide layer, in general, is ground and polished to a high degree of smoothness for providing a smooth surface for abutting the oxide layer on the other semiconductor layer. The oxide layer, in general, provides a relatively smooth surface for bonding to the semiconductor layer, however, being an oxide layer some flow of the oxide layer is accommodated during the annealing process in order to achieve a good bond between the respective surfaces.
In general, micro components, in particular, micro-electro-mechanical components and micro-opto-electro-mechanical components are high precision components, and in general, are relatively fragile, and are vulnerable to damage, in particular, distortion and the like if subjected to hostile environments. In particular, such micro-components are vulnerable to damage resulting from high temperature annealing processes. It is therefore desirable that the formation of such micro-components should be one of the last, and preferably, the last set of operation in the formation of the multi-layer semiconductor device. However, in many instances this is not possible, since it is required in many cases that the micro-components be formed in an intermediate layer between others of the semiconductor layers. In such cases, it is necessary that the micro-components to be formed prior to bonding of one of the intermediate layer to an adjacent layer or layers. In such cases, the micro-components are subjected to the high temperatures of the annealing process for bonding the intermediate layer within which the micro-components have already been formed to the adjacent layer. This is undesirable.
There is therefore a need for a method for forming a multi-layer semiconductor device which overcomes these problems.
The present invention is directed towards providing such a method, and a semiconductor device formed according to the method.
According to the invention there is provided a method for forming a semiconductor device comprising first, second and third layers, with a component being formed in the second layer, and first and second etch stop layers being located between the first and second layers, and the second and third layers, respectively, and at least the second etch stop layer being bonded to one of the second and third layers, the method comprising the steps of:
prior to bonding the one of the second and third layers to the second etch stop layer, patterning the second etch stop layer to define the component in the second layer for facilitating etching of the second layer through the third layer,
bonding the one of the second and third layers to the second etch stop layer, and
etching the second layer through the third layer and the second etch stop layer for forming the component in the second layer.
In one embodiment of the invention a portion of the third layer adjacent the component is etched for exposing the component. Preferably, the second layer is etched sequentially after the portion of the third layer adjacent the component has been etched in the same etching process.
Advantageously, the portion of the third layer adjacent the component which is etched for exposing the component is etched to the second etch stop layer. Ideally, the second layer is etched to the first etch stop layer for forming the component.
In one embodiment of the invention a portion of the second etch stop layer adjacent the component and which is exposed by the etched portion of the third layer is etched through the etched portion of the third layer for exposing the component. Advantageously, a portion of the first etch stop layer adjacent the component is etched for forming a void between the component and the first layer after the component has been formed.
In one embodiment of the invention a communicating bore is formed through the first layer communicating with the first etch stop layer for facilitating etching of the portion of the first etch stop layer adjacent the component for forming the void between the component and the first layer. Preferably, prior to etching the second layer for forming the component initially only a part of the portion of the first etch stop layer is etched through the communicating bore in the first layer for thinning the first etch stop layer for minimising stresses induced in the portion of the second layer from which the component is to be formed.
In another embodiment of the invention the first etch stop layer is bonded to one of the first and second layers, and is bonded to the one of the first and second layers prior to the second etch stop layer being bonded to the one of the second and third layers. Preferably, the second etch stop layer is formed on the second layer after bonding of the first etch stop to the respective one of the first and second layers.
In one embodiment of the invention the first and second etch stop layers are grown layers.
Preferably, the second etch stop layer is grown on the second layer, and the second etch stop layer is bonded to the third layer. Advantageously, the first etch stop layer is grown on the first layer, and the first etch stop layer is bonded to the second layer. Ideally, each of the first and second etch stop layers which are bonded to an adjacent one of first, second and third layers are bonded to the adjacent layer by annealing. Preferably, the annealing bonding step is carried out at a temperature in the range of 900xc2x0 C. to 1,200xc2x0 C. Advantageously, the annealing bonding step is carried out at a temperature in the order of 1,000xc2x0 C.
In one embodiment of the invention the first and second etch stop layers are oxide layers.
In another embodiment of the invention the second etch stop layer is patterned by depositing a photoresist layer on the second etch stop layer and exposing and developing a pattern which defines the component on the photoresist layer, and subsequently etching the second etch stop layer is define the component.
In another embodiment of the invention the first, second and third layers are of semiconductor material.
In one embodiment of the invention the first, second and third layers are of silicon material.
In another embodiment of the invention the first, second and third layers are of single crystal silicon.
In one embodiment of the invention the component is a micro-mechanical component.
In another embodiment of the invention the component is a micro-electro-mechanical component.
In a further embodiment of the invention the component is a micro-optical component.
In a still further embodiment of the invention the component is a micro-opto-electro-mechanical component.
In one embodiment of the invention the depth of the first etch stop layer is at least twice the depth of the second etch stop layer.
Additionally, the invention provides a method for forming a semiconductor device comprising at least a first layer and a second layer with a component formed in the second layer, a first etch stop layer being located between the first and second layers, and a second etch stop layer on the second layer such that the second layer is located between the first and second etch stop layers, the first etch stop layer being of depth greater than the second etch stop layer, the method comprising the steps of:
prior to forming the component in the second layer forming a communicating bore through the first layer communicating with the first etch stop layer adjacent a portion of the second layer where the component is to be formed, and etching a part of a portion of the first etch stop layer adjacent the portion of the second layer where the component is to be formed for thinning the first etch stop layer adjacent the portion of the second layer where the component is to be formed to an effective stress relieving depth for relieving stress in the portion of the second layer where the component is to be formed.
In one embodiment of the invention the portion of the first etch stop layer adjacent the component is thinned to a depth relative to the depth of the second etch stop layer for relieving stress in the portion of the second layer where the component is to be formed.
In another embodiment of the invention the portion of the first etch stop layer adjacent the component is thinned to a depth so that the difference in thicknesses of the respective first and second etch stop layers does not exceed 2 microns. Preferably, the portion of the first etch stop layer adjacent the component is thinned to a depth so that the difference in thicknesses of the respective first and second etch stop layers does note exceed 1 micron.
In another embodiment of the invention the depth of the first etch stop layer is at least twice the depth of the second etch stop layer.
Preferably, the first etch stop layer is bonded to one of the first and second layers.
In one embodiment of the invention the first etch stop layer is a grown layer.
In one embodiment of the invention the area in plan view of the portion of the first etch stop layer which is thinned is less than the area in plan view of the component.
Preferably, the area in plan view of the portion of the first etch stop layer which is thinned is at least half the area in plan view of the component.
Advantageously, the area in plan view of the portion of the first etch stop layer which is thinned is at least three-quarters the area in plan view of the component.
In one embodiment of the invention the cross-sectional area of the communicating bore through the first layer is at least half the area of the component in plan view.
In one embodiment of the invention the component is a micro-mechanical component.
Further the invention provides a semiconductor device comprising:
first, second and third layers,
a component formed in the second layer, and
first and second etch stop layers located between the first and second layers, and the second and third layers, respectively, at least the second etch stop layer being bonded to one of the second and third layers, wherein
prior to bonding the second etch stop layer to the one of the second and third layers, the second etch stop layer is patterned to define the component in the second layer for facilitating etching of the second layer through the third layer and the second etch stop layer, and the second layer is etched subsequent to the second etch stop layer having been bonded to the one of the first and second layers.
In one embodiment of the invention a portion of the third layer adjacent the component is etched for forming an opening through the third layer exposing the component.
In another embodiment of the invention a portion of the second etch stop layer adjacent the component is etched for removing the second etch stop from the component.
In a further embodiment of the invention a portion of the first etch stop layer adjacent the component is etched for removing the first etch stop layer from the component and for forming a void between the component and the first layer.
Preferably, the first etch stop layer is etched through a communicating bore formed through the first layer communicating with the first etch stop layer.
In one embodiment of the invention the first and second etch stop layers are oxide layers.
In another embodiment of the invention the first, second and third layers are layers of semiconductor material.
In another embodiment of the invention the first, second and third layers are of silicon material.
In a further embodiment of the invention the component is a micro-mechanical component.
In a still further embodiment of the invention the component is a micro-optical component.
The advantages of the invention are many. A particularly important advantage of the invention is that the method of the invention permits forming of components in the second layer which is located between first and third layers after the layers have been assembled. This would otherwise be difficult, if not impossible. If components were to be formed in the second layer after the three layers had been assembled, without using the method of the invention, it would be necessary to initially etch the first or the third layer to expose the portions of the second layer to be etched for forming the components. The exposed portions of the second layer would then have to be patterned through the first or the third layer, and subsequently etched. Patterning the second layer through a relatively deep first or third layer would be difficult if not impossible. Accordingly, by patterning the second etch stop layer prior to assembling the second and third layers permits the second layer to be readily and easily etched through the third layer and the second etch stop layer, and furthermore, and of particular importance permits accurate etching of the second layer through the third layer and the second etch stop layer. From this advantage many other important advantages follow. For example, since the first, second and third layers of the semiconductor device can be assembled and bonded or otherwise formed together prior to the formation of the component in the second layer, the formation of the component in the second layer can be left to one of the last, if not the actual last set of operations in the formation of the semiconductor device. Thus, once the component has been formed in the second layer the semiconductor device, and in turn, the component is not subjected to any hazardous environment which would otherwise damage the component. Additionally, by virtue of the fact that the formation of the component in the second layer can be left to the last or one of the last set of operations in the formation of the semiconductor device the amount of handling to which the semiconductor device is subjected after the component has been formed is minimised, thus further minimizing any danger of damage being caused to the component.
These advantages are particularly important when the component formed in the second layer is a micro-mechanical component, for example, a micro-electro-mechanical component or a micro-opto-electro-mechanical component. A further advantage of the invention is that circuitry can also be formed in the semiconductor layers for controlling the micro-component in the second layer and for other functions, and the formation of the circuitry can be carried out prior to the formation of the component in the second layer, thus avoiding damage to the component during the circuit forming processes.
The invention will be more clearly understood from the following description of some preferred embodiments thereof which are given by way of example only with reference to the accompanying drawings.